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MST718BU LCD TV Processor with Video Decoder Preliminary Data Sheet Version 0.1
FEATURES
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Video Decoder Y Supports NTSC, PAL and SECAM video input formats Y 2D NTSC and PAL comb-filter for Y/C separation of CVBS input Y Multiple CVBS and S-video inputs Y Supports Closed-caption and V-chip Y ACC, AGC, and DCGC (Digital Chroma Gain Control)
Y Differential 3-band peaking engine Y Vertical peaking Y Spatial noise reduction Y Luminance Transient Improvement (LTI) Y Chrominance Transient Improvement (CTI) Y Black Level Extension (BLE) Y White Level Extension (WLE) Y Favor Color Compensation (FCC) Y 3-channel gamma curve adjustment Y Independent 6 color of saturation, hue, and brightness control
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Analog Input Y Supports RGB input format from PC, camcorders and GPS Y Supports YCbCr inputs from conventional video source and HDTV Y Supports SCART - RGB + Fast Blank Y Supports video input 480i, 480p, 576i, 576p, 720p, 1080i; RGB input resolution in 640x480, 800x480, 800x600, 1024x768, and 1280x1024(SXGA) Y 3-channel low-power 10-bit ADCs integration for YCbCr and RGB Y Supports RGB composite sync input (CSYNC), SOY, SOG, HSYNC, and VSYNC Y On-chip clock synthesizer and PLL Y Auto-position adjustment, auto-phase adjustment, auto-gain adjustment, and auto-mode detection
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Scaling Engine/Panel Interface Y Supports digital panels up to 1366x768, and 1440x900 Y Supports single/dual 8-bit LVDS panel outputs Y Supports 8-bit TTL panel output Y Supports various displaying modes Y Supports horizontal panorama scaling Miscellaneous Y Built-in MCU Y 3-wire serial bus interface for configuration setup Y Built-in step-down PWM circuits for input 2.5V Y Built-in internal OSD with 512 programmable fonts, 12 or 4 bit per pixel color, 16-color palettes, and 12-bit color resolution Y Supports external OSD Y Support CVBS out Y Spread spectrum clocks Y Optional 3.3V / 5V output pads with programmable driving current Y 128-pin PQFP package
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Color Engine Y Brightness, contrast, saturation, and hue adjustment Y 9-tap programmable multi-purpose FIR (Finite Impulse Response) filter
Version 0.1
-1Copyright (c) 2006 MStar Semiconductor, Inc. All rights reserved.
3/15/2006
www..com
MST718BU LCD TV Processor with Video Decoder Preliminary Data Sheet Version 0.1
BLOCK DIAGRAM
R/Cr RGB /YCbCr G/Y B/Cb CVBS 1/2 Switch SY/CVBS S-Video 1/2 SC Auto Function for RGB / YCbCr ADC Input
2-Channel AFE
Video Decoder Timing Generator
YC Separation 2D Comb Filter
Chroma Demodulator
M U X
3x3 Color Space Conversion
MACE
Scaling Engine
CSC (RGB to YCbCr)
OSD
Gamma
Display Unit
T-CON
Display Device
MCU
BIU
Flash Memory or EEPROM
External MCU
SYSTEM APPLICATION DIAGRAM
Flash / ROM 2.5V
MicroController
PWM Step-Down
TV / Cable Signal
TV Tuner Video Decoder
Additional CVBS DVD / VCD S-Video Signal Additional S-Video Additional RGB Signal HDTV YPbPr Signal
TCON
To Digital Panel
Deinterlacer / Scaler
LVDS Tx
LVDS Out
Version 0.1
-2Copyright (c) 2006 MStar Semiconductor, Inc. All rights reserved.
3/15/2006
www..com
MST718BU LCD TV Processor with Video Decoder Preliminary Data Sheet Version 0.1
GENERAL DESCRIPTION
The MST718BU is a high quality ASIC for NTSC/PAL/SECAM LCD-TV application. signals, as well as analog RGB input from GPS systems. It receives analog NTSC/PAL/SECAM CVBS and S-Video inputs from TV tuners, DVD or VCR sources, including weak and distorted Automatic gain control (AGC) and 10-bit 3-channel With automatic video source and mode detection, Multiple internal adaptive PLLs precisely extract Built-in line-buffer supports adaptive 2-D The output format of A/D converters provide high resolution video quantization. users can easily switch and adjust variety of signal sources.
pixel clock from video source and perform sharp color demodulation. MST718BU supports 8-bit TTL or LVDS digital TFT-LCD modules.
comb-filter, 2-D sharpening, and synchronization stabler in a condense manner.
Version 0.1
-3Copyright (c) 2006 MStar Semiconductor, Inc. All rights reserved.
3/15/2006
www..com
MST718BU LCD TV Processor with Video Decoder Preliminary Data Sheet Version 0.1
PIN DIAGRAM (MST718BU)
BOUT[7]/LVB0M BOUT[5]/LVB1M BOUT[3]/LVB2M
104
BOUT[4]/LVB1P
105
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
GND VMID VCLAMP REFM REFP AVDD_ADC PRINP PRINM PBINP PBINM SOY YINP YINM BINP BINM SOGIN GINP GINM RINP RINM AVDD_ADC C1INP C1INM YS1INP YS1INM C2INP C2INM YS2INP YS2INM CVBS1P CVBS1M CVBS2P CVBS2M CVBSO1 AVDD_GMC GND AVDD_PWM PWMOUT2
103
BOUT[2]/LVB2P BOUT[1]/LVBCKM BOUT[0]/LVBCKP 100 INT_OUT 99 GOUT[7]/LVB3M 98 GOUT[6]/LVB3P 97 GOUT[5] 96 GOUT[4] 95 GOUT[3]/LVA0M 94 GOUT[2]/LVA0P 93 GOUT[1]/LVA1M 92 GOUT[0]/LVA1P 91 ROUT[7] 90 ROUT[6] 89 ROUT[5]/LVA2M 88 ROUT[4]/LVA2P 87 ROUT[3]/LVACKM 86 ROUT[2]/LVACKP 85 ROUT[1]/LVA3M 84 ROUT[0]/LVA3P 83 GPIO_P07 82 VDDP 81 GND 80 HSYNCO 79 VSYNCO 78 DEO 77 CLKO 76 FB/GPIO_P33 75 OSDB/GPIO_P32 74 OSDG/GPIO_P31 73 OSDR/GPIO_P30 72 RESET 71 PWMD1 70 PWMD2 69 GND 68 POWER_ON_RSTN/CS 67 SCL 66 SDA 65 INT
102 101
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
Pin 1
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49
50
51
52
53
54
55
56
57
58
59
60
BOUT[6]LVB0P
VREXT_CDAC
AVDD_CDAC
AVDD_MPLL
AVDD_XTAL
AVDD_OPLL
HSYNCIN1
HSYNCIN2
VSYNCIN1
VSYNXIN2 XIN
MCUSEL
CVBSO2
VDDC
XOUT
GND
GND
GND
GND
GND
GND
61
62
63
SENSE2
PWMOUT1
FB1
SENSE1
SAR0
SAR1
SAR2
GPIO_P24/PWMD3
GPIO_P25/PWMD4
GPIO_P00
GPIO_P01
GPIO_P02
GPIO_P03
GPIO_P05
PGOOD
GND VDDP
VDDC
GND
SCK
SDI
SDO
FB2
GPIO_P04
Version 0.1
-4Copyright (c) 2006 MStar Semiconductor, Inc. All rights reserved.
GPIO_P06
CSN
64
XXXXXXXXXXX XXXXX
MST718BU
3/15/2006

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